Assemble ../../../../as/cmd/DC/dc__label_both.casl (0)
Assemble ../../../../as/cmd/DC/dc__label_both.casl (1)
../../../../as/cmd/DC/dc__label_both.casl: 1:MAIN START
../../../../as/cmd/DC/dc__label_both.casl: 2: LAD GR2,ADR1
#0000 #1220
#0001 #0006
../../../../as/cmd/DC/dc__label_both.casl: 3: LD GR1,ADR0
#0002 #1010
#0003 #0005
../../../../as/cmd/DC/dc__label_both.casl: 4: RET
#0004 #8100
../../../../as/cmd/DC/dc__label_both.casl: 5:ADR0 DC ADR1
#0005 #0006
../../../../as/cmd/DC/dc__label_both.casl: 6:ADR1 DC 13
#0006 #000D
../../../../as/cmd/DC/dc__label_both.casl: 7: END
../../../../as/cmd/DC/dc__label_both.casl: 8:ADR1 START
../../../../as/cmd/DC/dc__label_both.casl: 9: LAD GR2,29
#0007 #1220
#0008 #001D
../../../../as/cmd/DC/dc__label_both.casl: 10: RET
#0009 #8100
../../../../as/cmd/DC/dc__label_both.casl: 11: END
#0000: Register::::
#0000: GR0: 0 = #0000 = 0000000000000000
#0000: GR1: 0 = #0000 = 0000000000000000
#0000: GR2: 0 = #0000 = 0000000000000000
#0000: GR3: 0 = #0000 = 0000000000000000
#0000: GR4: 0 = #0000 = 0000000000000000
#0000: GR5: 0 = #0000 = 0000000000000000
#0000: GR6: 0 = #0000 = 0000000000000000
#0000: GR7: 0 = #0000 = 0000000000000000
#0000: SP: 16 = #0010 = 0000000000010000
#0000: PR: 0 = #0000 = 0000000000000000
#0000: FR (OF SF ZF): 000
#0000: Memory::::
#0000: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
-------------------------------------------------------------------------------------
#0000: 0000: 1220 0006 1010 0005 8100 0006 000D 1220 001D 8100 0000 0000 0000 0000 0000 0000
#0002: Register::::
#0002: GR0: 0 = #0000 = 0000000000000000
#0002: GR1: 0 = #0000 = 0000000000000000
#0002: GR2: 6 = #0006 = 0000000000000110
#0002: GR3: 0 = #0000 = 0000000000000000
#0002: GR4: 0 = #0000 = 0000000000000000
#0002: GR5: 0 = #0000 = 0000000000000000
#0002: GR6: 0 = #0000 = 0000000000000000
#0002: GR7: 0 = #0000 = 0000000000000000
#0002: SP: 16 = #0010 = 0000000000010000
#0002: PR: 2 = #0002 = 0000000000000010
#0002: FR (OF SF ZF): 000
#0002: Memory::::
#0002: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
-------------------------------------------------------------------------------------
#0002: 0000: 1220 0006 1010 0005 8100 0006 000D 1220 001D 8100 0000 0000 0000 0000 0000 0000
#0004: Register::::
#0004: GR0: 0 = #0000 = 0000000000000000
#0004: GR1: 6 = #0006 = 0000000000000110
#0004: GR2: 6 = #0006 = 0000000000000110
#0004: GR3: 0 = #0000 = 0000000000000000
#0004: GR4: 0 = #0000 = 0000000000000000
#0004: GR5: 0 = #0000 = 0000000000000000
#0004: GR6: 0 = #0000 = 0000000000000000
#0004: GR7: 0 = #0000 = 0000000000000000
#0004: SP: 16 = #0010 = 0000000000010000
#0004: PR: 4 = #0004 = 0000000000000100
#0004: FR (OF SF ZF): 000
#0004: Memory::::
#0004: adr : 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000A 000B 000C 000D 000E 000F
-------------------------------------------------------------------------------------
#0004: 0000: 1220 0006 1010 0005 8100 0006 000D 1220 001D 8100 0000 0000 0000 0000 0000 0000